[Panel Discussion] Current Status and Outlook of AI and AI Semiconductor Technologies

Hoi-Jun Yoo is a member of National Academy of Science of Korea, the KAIST ICT Endowed Chair Professor of School of Electrical Engineering and Dean of the AI Semiconductor Graduate School at KAIST. He is also the Director of the AI-PIM Research Center, and the Director of KAIST Institute of IT-AI Convergence. His research focuses on Wearable Healthcare systems, AI-SoC design, High-Speed and Low-Power memory architectures, and PIM circuits. He has published over 200 journal papers and more than 400 conference papers in these areas. Prior to joining KAIST in 1998, he worked for Bell Communications Research developing VCSELs. He is a Fellow of IEEE, has served as an AdCom member of the IEEE SSCS since 2022, the TPC Chair of ISSCC, and the Chairman of the Steering Committee of the A-SSCC.

Prof. Yoo has been at the forefront of semiconductor and system design innovation, with his group’s research on physical-AI accelerators integrated into mobile XR/Robotic SoCs. His achievements have been recognized with numerous awards, including the Kyung Ahm Scholarship Award, the KAIST Grand Prize for Academic Excellence, multiple IEEE Best Paper Awards, and Top 5 Paper Contributor in 70 years of ISSCC, and Top 10 Paper Contributor in 60 years of ISSCC.

Dr. Joungho Kim received B.S. and M.S. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 1984 and 1986, respectively, and Ph.D degree in electrical engineering from the University of Michigan, Ann Arbor, in 1993. In 1996, he moved to KAIST (Korea Advanced Institute of Science and Technology). He is currently professor at electrical engineering department of KAIST and a joint faculty member of KAIST AI college. Also, he serves as the director of Samsung-KAIST Industry Collaboration Center. He is an IEEE fellow.

His research is focusing on the developing machine learning and reinforcement learning methodologies for the high-speed IC, package, and PCB designs including 3D IC, HBM, HBF and next generation AI computer modules. In addition, his research is centered on signal integrity, power integrity, and electromagnetic interference for TSV, Interposer, HBM, and System-in-Package designs. He has authored and co-authored over 659 technical papers published at refereed journals and conference proceedings. 

Dr. Sun-Ghil Lee earned his Ph.D. in 1998 from KAIST (Department of Physics, Solid-State Theoretical Physics Lab.). From 1998 to 2002, he worked at Hyundai Electronics in the TCAD team, focusing on DRAM development. He then joined Samsung Electronics (2003–2012) in the Process Development team, where he contributed to FEOL process development for DRAM, Flash, and Logic technologies. 

From 2012 to 2015, Dr. Lee served as the Samsung team’s on-site manager at imec in Leuven, Belgium. He returned to Samsung Electronics in 2015 and worked in the Logic TD team (2015–2017), supporting 7nm technology development. 

Since 2017, he has been with Tokyo Electron (TEL), holding roles across Tokyo Electron Korea, TEL Technology Solutions in Yamanashi, Japan, and TEL Technology Center America in Albany, NY, USA (2017–2024). He is currently (2024–present) the Technology Division Manager at Tokyo Electron Korea. 

Seungwoo Lee has been the head of research at Eugene Investment & Securities for 6 years with responsibility for research division and semiconductor segment.  

Prior to joining Eugene, Lee built his career at Daewoo Economic Research Institute, Shinyoung Securities, Rhee Capital Advisors and IBK Investment & Securities. As a semiconductor analyst, he has been recognized as a best analyst multiple times by leading media outlets like Hankyung Business, Maeil Business newspaper, Yonhap Infomax. Chosun Il-bo and so on.   

Lee received a master’s degree in Business Administration and a bachelor’s degree in Computer Engineering from Seoul National University. 

Master Kyomin Son is a Master (VP of Technology) at Samsung Electronics, responsible for future DRAM architecture and circuit technologies. He received his B.S. (1994) and M.S. (1996) in Electrical Engineering from Yonsei University, and earned his Ph.D. in Electrical Engineering and Computer Science (EECS) from KAIST in 2007.

He joined Samsung Electronics in 1996 and contributed to high-speed SRAM design until 2003. After completing his Ph.D. in 2007, he returned to the DRAM Design Team, where he contributed to Mobile I/O and DDR4 product design, led the development of HBM2, and spearheaded HBMPIM development. He is currently leading DRAM development for AI applications, with a particular focus on DRAM-PIM.

Since 2012, he has served as a Technical Program Committee (TPC) member of the Symposium on VLSI Circuits. He has authored numerous publications on SRAM/DRAM and other memory technologies, and holds multiple patents.

Dr. Lee is a globally recognized expert and pioneer in advanced semiconductor packaging and 3D TSV-stacked memory, including HBM (High Bandwidth Memory). With over 27 years of experience, he has led 3D integration/packaging R&D spanning core technology and product development, reliability, and high-volume manufacturing for HBM.

He received his Ph.D. in Machine Intelligence and Systems Engineering from Tohoku University (2000), and completed postdoctoral research at Rensselaer Polytechnic Institute (2001–2002). He worked at Samsung Electronics as a Principal Engineer (2002–2008), served as a Professor at Tohoku University’s NICHe (2008–2016), and was a VP at Amkor Technology Korea R&D Center (2017–2018). He joined SK hynix in 2018 and currently serves as Senior Vice President and Head of Package Development.

Dr. Lee’s contributions have been recognized with major honors, including the IEEE EPS Electronics Manufacturing Technology Award (2024), the Daewon Kahng Award (2025), and the ISES Hall of Fame (2025). He is a Senior Member of IEEE.