Kyomin Sohn

Master Kyomin Son is a Master (VP of Technology) at Samsung Electronics, responsible for future DRAM architecture and circuit technologies. He received his B.S. (1994) and M.S. (1996) in Electrical Engineering from Yonsei University, and earned his Ph.D. in Electrical Engineering and Computer Science (EECS) from KAIST in 2007.

He joined Samsung Electronics in 1996 and contributed to high-speed SRAM design until 2003. After completing his Ph.D. in 2007, he returned to the DRAM Design Team, where he contributed to Mobile I/O and DDR4 product design, led the development of HBM2, and spearheaded HBMPIM development. He is currently leading DRAM development for AI applications, with a particular focus on DRAM-PIM.

Since 2012, he has served as a Technical Program Committee (TPC) member of the Symposium on VLSI Circuits. He has authored numerous publications on SRAM/DRAM and other memory technologies, and holds multiple patents.