[Presentations (Moderator: Prof. Yoon-Jong Lee, KAIST)] Memory Reimagined: From High-Bandwidth to In-Memory Processing

2:50 pm - 3:15 pm

As the scale and complexity of AI models—including large language models (LLMs) and generative AI—grow exponentially, the industry is facing a critical challenge: the “memory wall.” Bandwidth limits and the power cost of data movement are no longer minor constraints; they are becoming structural barriers to further AI progress.

This presentation examines how Samsung Electronics is redefining the role of memory to address these challenges. It provides a comprehensive overview of Samsung’s AI-optimized advanced memory hierarchy—HBM for extreme performance, CXL for scalable capacity, and LPDDR for on-device AI.

The talk then takes a deeper look at Processing-in-Memory (PIM), an innovative approach that integrates compute capabilities directly into memory devices. We will discuss how DRAM-PIM minimizes data movement, fundamentally reshapes computer architecture, and delivers significant gains in performance and energy efficiency—highlighting how the convergence of memory and compute is shaping the future of AI infrastructure.

Featured Speakers

Kyomin Sohn

Master, Samsung Electronics

Master Kyomin Son is a Master (VP of Technology) at Samsung Electronics, responsible for future DRAM architecture and circuit technologies. He received his B.S. (1994) and M.S. (1996) in Electrical Engineering from Yonsei University, and earned his Ph.D. in Electrical Engineering and Computer Science (EECS) from KAIST in 2007.

He joined Samsung Electronics in 1996 and contributed to high-speed SRAM design until 2003. After completing his Ph.D. in 2007, he returned to the DRAM Design Team, where he contributed to Mobile I/O and DDR4 product design, led the development of HBM2, and spearheaded HBMPIM development. He is currently leading DRAM development for AI applications, with a particular focus on DRAM-PIM.

Since 2012, he has served as a Technical Program Committee (TPC) member of the Symposium on VLSI Circuits. He has authored numerous publications on SRAM/DRAM and other memory technologies, and holds multiple patents.