Skip to main content

Beyond ZFLOPS: What's Next?

Architecting the Future of AI Systems

10:20 am - 10:40 am

Recent advances in AI have accelerated the transition from generative AI to physical AI. To support this paradigm shift, AI systems have primarily focused on enhancing chips – including CPU, GPU, HBM, Advanced PKG – to maximize FLOPs performance.

However, the realization of next-generation FLOPs performance using a single chip faces fundamental limitations, therefore a new approach beyond conventional architectures is required.Conventional single-chip based AI architecture have been constrained by key bottlenecks, including power, latency, bandwidth, and thermal management. Overcoming these limitations requires a holistic AI system architecture in which design, logic, memory and packaging are simultaneously optimized. Samsung is creating differentiated value through the development of Memory Aware Logic, Logic Aware Memory, and Advanced PKG technologies that go beyond simple interconnects. These capabilities enable the delivery of customer-specific solutions, including custom ASICs and custom memory, while also expanding continuous development in advanced process nodes and differentiated product portfolios.

With comprehensive in-house capabilities across memory, foundry, packaging and design, Samsung is uniquely positioned on a global scale to deliver fully customized and optimally integrated AI solutions aligned with customer requirements.

Featured Speakers

Jaihyuk Song_2

Jaihyuk Song

Corporate President & CTO, Samsung Electronics

Dr. Jaihyuk Song is the Corporate President and CTO of Samsung Electronics’ Device Solutions Business leading the Semiconductor R&D Center.  

Prior to his appointment as the President and CTO, Dr. Song served as EVP and Head of Semiconductor R&D Center responsible for managing a broad range of semiconductor R&D activities from fundamental research to chip level testing, and driving innovation in DRAM, NAND Flash, Advanced Logic and Package, as well as New Memory and CIS device technology development.

Dr. Song started his career as a DRAM process engineer at Samsung in 1996, and has held several management positions in Flash Memory Product & Technology Development at Samsung’s Memory Business. Before joining the R&D Center, he has been mainly responsible for driving the company’s NAND Flash Memory technology development. Starting with the planar 2D structure in 2004, and the revolutionary vertical 3D structure in 2013, which has become an industry-standard since its groundbreaking introduction, he has played a key role in pioneering V-NAND technology solutions for seven consecutive generations.

A veteran within the semiconductor ecosystem, in April 2024, Dr. Song was awarded by the Korean Federation of Science and Technology Societies, the Science and Technology Medal of Innovation "for his devotion and contribution to the Korean semiconductor industry during the last 33 years, by exerting technology leadership from process development to mass production." And was also elected to join the National Academy of Engineering of Korea. In 2017, he was presented with the Korea Technology Award, Presidential Award, by the Ministry of Trade, Industry and Energy, for the development of the 64-layer 4th generation V-NAND solution.

Dr. Song holds a doctoral and master’s degrees in Electrical Engineering from Seoul National University, and a bachelor’s degree in Electrical Engineering from the Korea Advanced Institute of Science and Technology (KAIST).