Applications of High Speed IR and Micro-Bump Metrology for Advanced Packaging of Advanced Memory and Logic Devices

In the post-Moore era, advanced packaging is becoming more critical to meet the ever-increasing demands of electronic products with smaller size, more powerful performance and lower cost.Heterogeneous integration technology of 2.5D/3DIC and high-bandwidth memory(HBM) stand at the forefront of multiple technology developments as a critical enabler of artificial intelligence(AI),high performance computing(HPC),5G, Autonomous car, etc. 

However, as the performance requirements become more stringent, there is a need to further scale down to increase interconnect density. Industry trend toward devices with higher bump densities is driving the need for test equipment to measure the uniformity of bump height across a device with tighter accuracy and faster throughput requirements. Leading HBM device makers and foundries must simultaneously handle yield-killer defect inspection and critical dimension metrology for W2W/D2W bonding, die warpage and wafer dicing processes. 

In this presentation, we introduce the ONTO INNOVATION two key enabler solutions known as High Speed IR Inspection and 3Di Micro-Bump Metrology that can be adopted to address a wide range of applications in advanced packaging of advanced memory and logic devices.