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Next Generation DRAM with Oxide Semiconductor (IGZO) and Cell Structure

4:35 pm - 5:00 pm

As conventional BCAT-based DRAM approaches its physical scaling limits, the memory industry faces a critical turning point. To overcome these barriers, a paradigm shift toward new architectures and innovative channel materials is required. 

This presentation proposes 3D vertical structures, such as VCT (Vertical Channel Transistor) and VS-CAT, as the definitive solution for future scaling. Furthermore, we highlight the necessity of adopting novel channel materials like oxide semiconductor (IGZO). Unlike silicon, IGZO is deposition-capable and exhibits extremely low leakage current, making it ideal for 3D integration and retention improvement. 

We conclude that the convergence of IGZO channel materials and 3D vertical architectures presents the most promising pathway for realizing next-generation DRAM technology. 

Featured Speakers

Minhee Cho

Min Hee Cho

Distinguished Engineer, Task Leader, Samsung Electronics

Min Hee Cho received his B.S. degree summa cum laude from Yonsei University and M.S. degree from KAIST, Korea, in 1998 and 2000, respectively. He obtained his Ph.D. degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 2012. Since joining Samsung Electronics in 2000, he has focused on DRAM process integration and device development. He is currently a Distinguished Engineer and the Group Leader of the DRAM Group at the Advanced Device Research Lab. His research interests include oxide semiconductor transistors (IGZO), next-generation DRAM architectures, and low-power devices. He was selected as a Distinguished Engineer in 2024 and has authored 47 papers and holds 88 U.S. patents.