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Advanced embedded memory technology for generative AI development at the edge

1:00 pm - 1:40 pm

Edge devices supporting generative AI must deliver high performance under strict power, area, and cost constraints, making advanced embedded memory technologies a critical enabler. As generative models grow in size and complexity, on-chip memory capacity and efficiency increasingly limit the scale, accuracy, and responsiveness of models that can run locally. SRAM scaling challenges in advanced technology nodes exacerbate these limitations, driving the need for memory-efficient model design techniques such as quantization and pruning.

Memory access dominates energy consumption in edge AI systems, particularly for generativeworkloads with frequent weight and activation access. Advanced embedded memories are therefore essential to reduce power, support higher bandwidth, and enable larger models within tight energy budgets—especially for battery-powered and energy-harvesting devices.

Emerging embedded memory technologies, including high-speed MRAM, FeRAM, FeFETs, andeDRAM, offer compelling alternatives to SRAM by improving density, lowering leakage, andreducing area and power overheads for storing generative AI model weights. When combined with event-driven and memory-centric computing paradigms, these technologies can further reduce latency and energy consumption. Although no single solution is yet optimal, a systematic comparison of advanced embedded memory options is crucial to guide the development of efficient, scalable generative AI systems at the edge.

Featured Speakers

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Gouri Sankar Kar (invited)

VP R&D Compute and Memory Device Technologies, imec

Gouri Sankar Kar, Ph.D., serves as Vice President of R&D at Imec, where he leads cutting-edge research across logic, interconnect, memory, storage, and quantum device technologies. He defines and drives the company’s vision, strategic initiatives, and technology roadmaps, shaping the future of advanced semiconductor innovation.

Prior to joining Imec, Dr. Kar was lead integrator for Infineon/Qimonda Company. During his 4 years at Infineon/Qimonda, Dr. Kar spent time developing buried bit- line and word-line to integrate vertical transistors for 4F2 DRAM technology.

Dr Kar received a PhD degree in Semiconductor device technology from IIT Kharagpur, India on 2002. He moved to Germany and joined Max Planck Institute for Solid State Research in the group of Prof. Klaus von Klitzing where he gained the knowledge in quantum dot growth and their applications.