Building Scalable Infrastructure for the AI Factories of Tomorrow: Cadence’s End-to-end Approach

11:00 am - 11:20 am

The next generation of artificial intelligence infrastructure demands unprecedented levels of modularity, scalability, and computational performance.

Cadence is advancing silicon design through a chiplet-centric approach, leveraging a comprehensive portfolio of high-performance IP—including HBM3E/4, PCIe 7.0/8.0, UALink, Ultra Ethernet, and high-speed SerDes—to enable disaggregated architectures tailored for AI workloads.

This presentation explores how Cadence’s differentiated IP and chiplet frameworks accelerate time-to-market, simplify engineering complexity, and unlock new monetization models across hyperscale data centers, edge computing, and 
automotive platforms. With silicon-proven subsystems and strategic collaborations with leading foundries and ecosystem partners, Cadence is delivering the foundational technologies for tomorrow’s AI factories—where configurability, performance, and ecosystem integration converge to drive innovation.

Featured Speakers

Boyd

Boyd Phelps

Senior VP & GM, Silicon Solutions Group, Cadence Design Systems

Boyd Phelps has served as the Senior Vice President and General Manager of the Silicon Solutions Group (SSG) of Cadence since 2023. He is responsible for the design and development of Cadence’s hard and soft IP portfolio, investments, and roadmaps, supporting customers throughout all markets and segments in silicon design.

Prior to Cadence, Phelps worked at Intel, where he spent more than 25 years responsible for client architecture and design development as well as x86 CPU research and development for all business segments. Phelps is recognized across the industry for his CPU development achievements, as well as his contributions to process and design technology co-optimization, and was instrumental in the development and optimization of numerous leading-edge process technologies 
and designs. In these capacities, he has driven significant growth as well as brought to market several new segments and advances in CPU architecture and design.

Phelps received a BS in electrical engineering from Brigham Young University and graduated from the Stanford Executive Accelerator program.