[Keynote] Supply Chain Integrity: A Fabless Manufacturing Perspective
System on Chip (SoC) semiconductor security assurance cannot be achieved by design-time protections alone. In a fabless semiconductor model, outsourced and offshore manufacturing introduces high product integrity risk. Supplychain assurance must be treated as a firstclass security problem alongside boot, runtime, and debug security methods. Any weakness in the global semiconductor supply chain can undermine all other SoC security controls. Even wellsecured designs are vulnerable if attackers can bypass protections during design, fabrication, assembly, test, or distribution.
Loss of control due to outsourced and offshore manufacturing brings insider threats across design and manufacturing partners and makes available exposure of sensitive IP through test programs, and other debug capabilities. To address these risks, the presentation proposes a manufacturing integrity framework built on existing semiconductor quality and IPprotection practices.The framework can is intended to provide a baseline intended to support higherassurance security use cases, including some government needs. As part of the integrity framework, an informal, actuarialstyle threat analysis is introduced to prioritize the implementation of semiconductor supply chain mitigations.