Kisik Choi, Ph.D. has been leading advanced interconnect integration team at IBM Research at Albany, New York since 2017 with responsibility of developing innovative interconnect technologies for MOL & BEOL of advanced logic nodes beyond 7 nm. His team is integrating advanced patterning technologies for near-30 nm pitch with EUV, ultra low-k dielectrics, and metallization techniques to deliver interconnect solutions.
Prior to joining IBM, Dr. Choi was Research Fellow / V.P. at SK Hynix in Korea. During his 3 years at SK Hynix, He led a technology development team which successfully delivered 28nm Logic technology with RMG. Prior to joining SK Hynix, he was a manager at Globalfoundries and high-k/metal gate expert in the research alliance based in IBM’s T. J. Watson Research Center and contributed to the serial development of IBM alliance’s advanced logic technologies including 10nm finFETs.
He is a recipient of IEEE EDS George E. Smith Award in 2013 for his high-k/metal gate paper. The body of work he contributed as an alliance partner was recognized as IBM Research Extraordinary Accomplishment (the highest honor in IBM Research) 'High-k/metal-gate Technology for High Performance Server and Low Power Mobile Applications' in 2016. After joining IBM in 2016, he received IBM’s Outstanding Technical Achievement Award in 2018. He has authored or co-authored more than 80 publications in peer-reviewed journals and conference proceedings.
Dr. Choi received a Ph.D. degree in Electrical & Computer Engineering from Texas Tech University, Lubbock, TX, USA and M.S./B.S. degree in Materials Science and Engineering from Seoul Nation University, Seoul, Korea. He is a senior member of IEEE.