Jisuk Hong has been principal engineer at Samsung Electronics since 2003 with responsibility of OPC development, RET optimization and lithographic design for manufacturing setup for logic and memory devices. His current role includes project leader of OPC S/W development and OPC path-finding for next node semiconductor devices.
Prior to joining Samsung Electronics, Jisuk Hong was photolithography engineer for SK Hynix. During his 5 years at SK Hynix, Jisuk Hong spent time on lithography process development for memory devices, lithography simulation and full-chip OPC tool evaluation.
Jisuk Hong received a Master degree in computational chemistry from KAIST, Daejeon, Republic of Korea. He majored in molecular dynamics and Monte Carlo simulation to understand the equilibrium structure and dynamic properties of polymer materials.
본 연사의 발표는 S1. Advanced Lithography(STS) 에서 볼 수 있습니다.