S6. Electropackage System and Interconnect Product

Room 317, COEX Thursday, January 24
1:00pm to 5:00pm

업데이트 예정
As packaging, wafer level and heterogeneous system assembly in general, electronic systems for future mobility, 5G, AI and Automotive are targeting to find solutions for those key critical aspects of packaging: Performance, Flexibility and Cost competitiveness. Those solutions will make huge connection among system and system such as sensor and logic, logic and memory, antenna and logic. So we are expecting to make a new vision era how packaging as a SIP, FOWLP, 3D IC, and 2.5D IC will open to new market as a heart of 4th industry generation. To address those, chip-packaging-system interaction needs to be better understood. The experts of device design, FABs engineering, packaging, and system need to move closer together. Materials and Equipments need to be developed and tested for electronic systems. Those are the challenging but this session is helping to share the recent advanced packaging information.


  • 행사명: S6. Electropackage System and Interconnect Product
  • 날짜: 2019년 1월 24일(목)
  • 시간: 13:00-17:00
  • 장소: 코엑스 3층 317호
  • 주제
  • 언어
  • 후원



  • Gu Sung Kim (Kangnam University)
  • Young Bae Park (Andong National University)
  • Min Suk Suh (SK hynix)
  • Hogeon Song (Samsung Electronics)
  • WS Shin (ASE Korea)
  • Seh Kwang Lee (Ehwa Diamond)
  • Hanchoon Lee (DB HiTek)
  • Ji Young Chung (Amkor Technology Korea)
  • Soon Jin Cho (Samsung Electro-Mechanics)
  • Taeje Cho (Samsung Electro-Mechanics)
  • CS Han (ASE Korea)



  SEMI 회원사 비회원사 학생
사전등록(1/24까지) 150,000 원 180,000 원 80,000 원
현장등록 180,000 원 200,000 원 100,000 원



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