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논문모집

논문모집

SEMI에서 주최하는 제 32회 SEMICON Korea 2019 기간 동안 진행되는 SEMI 기술심포지움(이하 STS)에서 발표될 논문을 모집합니다. 본 심포지움은 국내외 소자업체, 반도체 장비 및 재료 업체의 기술전문가, 학계 전문가들 그리고 학생들이 한자리에 모여 반도체 생산 공정의 최신 기술을 소개하고 앞으로의 기술 동향 및 정보 교환을 그 취지로 하고 있습니다.

소자업체, 장비 및 재료 업체에 종사하는 기술 실무진과 관련 분야에 있는 학계 분이라면 누구든 참여하실 수 있습니다. 논문 초록의 접수 후 10월 말까지 각 분과의 위원들의 심사를 거쳐 발표여부가 결정이 되며 그 이후에는 일정에 맞추어 논문과 발표자료를 제출하시면 됩니다.

매년 STS에서는 한국 및 전세계 향후 반도체 기술의 방향을 제시하고, 반도체 산업 현황 및 발전 가능성에 관하여 심도 깊은 논의가 이루어져 왔습니다. 논문발표 기회와 더불어 세계 반도체 전문가와 교류하는 SEMI 기술심포지움에 반도체 전문가 분들의 많은 참여를 부탁드립니다.

모집하고있는 논문의 분야는 하기와 같습니다. 

Session 1. Advanced Lithography

  • Extreme Ultraviolet Lithography including Sources and High NA
  • Directed Self Assembly and its Application
  • Alternative Lithography (Nano-Imprint, Non-Optical and others)
  • Various Multiple Patterning Techniques
  • Patterning Materials and Processes
  • Mask Process, Blank, and Infrastructure
  • Modeling and Simulation (Stochastic, Mask 3D Effect, and others)
  • OPC and Design Process Technology Co-Optimization for Manufacturability
  • Advanced Metrology Technology for Wafer and Mask
  • Application of Lithography to Semiconductor IC and Nanotechnology

 

Session 2. Advanced Materials & Process Technology

  • Gapfill Materials and Process
  • Interconnection Processes (Metallic and Optical Interconnects)
  • Dielectric Processes for Gate, Capacitor, Interconnect, and Passivation
  • Doping & Heat Treatment Process (I2p, Plasma Doping, GILD, SADS, RTP, Furnace, Damage Control)
  • Epitaxial Growth and Selective Growth
  • SOI Materials & Processes (Wafer and Device Manufacturing)
  • Materials and Processes for Non Volatile Memory Devices
  • Materials and Process for Atomic-scale Deposition
  • Process for Low-dimensional Devices (Quantum Dots and Nano-wires)
  • 2D Materials Technology (Graphene, Sulfide, and etc.)
  • Materials for Flexible/ Plastic Electronics
  • Materials and Process for Beyond Moore

 

Session 3. Device Technology

  • BCD (Bipolar-CMOS-DMOS)/ NVM (Non-Volatile Memory)/ Analog/ MEMS
  • A.I.-friendly Device Technology
  • SoC Technology
  • Advanced CMOS Technology
  • Advanced Memory Technology
  • SOI Devices
  • RF Devices
  • Nano-scale Devices
  • Thin Film Devices
  • Interconnection Technology
  • Advanced Junction/Doping Technology
  • Process/Device/Interconnection Modeling
  • Device/Interconnection Reliability
  • Device Technology for Mobile/ Automotive Application
  • Emerging Devices- Phase Transitions, Negative Capacitance, Negative Resistance, Spintronics
  • Low-dimensional Devices- 2D Materials, Nanowires

 

Session 4. Plasma Science and Etching Technology

  • 3D Etch Technologies for VNAND, 3D X-point, FinFET, Nano Wire, TSV and etc.
  • New & Novel Material Etch for MRAM, PRAM, ReRAM and etc.
  • Multi Patterning Technologies (DPT, QPT, n(LE) & etc) 
  • Dry Etching of EUV Mask Pattern (T2T Margin, New Materials, Defect & etc)
  • Selective Etch Technique
  • Atomic Layer Etching (ALE) and Low Damage Etching (LDE)
  • Etch Technologies related to FEOL (FNFET and GAA etc.) and BEOL (SAC & small CNT, Low-k etc.)
  • HARC & HART Etch Technology
  • Next Generation Etching Technology (Ultra-low Temp. Etch, Ion Beam Etch, Radical Etch, etc.)
  • Tool to Tool Matching (TTTM) Technologies
  • Plasma & Process Diagnostics, Sensors, and Control
  • Simulation and Modeling for Plasma Source and Process 
  • Innovative Approaches to Atomic Layer Material Removal
  • Control of Extreme Edge Uniformity for <10nm Patterning
  • Fine APC (Automatic Process Control) Technology, and Virtual Monitoring Technology
  • Advanced Plasma Based Dry Cleaning Process

 

Session 5. Contamination-free Manufacturing and CMP Technology

  • Advanced Wet/Dry Surface Preparation in FEOL/BEOL
  • Particle Removal Mechanism & Technology
  • Micro-, Nano-contamination Control
  • Damage/Loss Free Nano Particle Removal
  • Yield Enhancement Technology
  • Environmentally Benign Manufacturing/PFC Emission Reduction
  • Advanced Wet/ Dry Cleaning for 3D Structure and New Materials
  • Interface Control in Cleaning
  • Drying & Leaning Free Technology
  • Advanced CMP Process Control
  • Advances in CMP, Related Processes and Equipments
  • CMP Consumables and Metrology
  • Machine Learning in CMP
  • Challenge for Future CMP & New Technology (Equipment & Material)
  • Scratch Reduction/Mechanism
  • CMP Modeling and Simulation
  • Post CMP Cleaning
  • Robust CMP Process for Pattern Loading Effect Minimize
  • Alternative CMP Technologies
  • CMP for New Materials and MEMS

 

Session 6. Electropackage System and Interconnect Product

  • Fan-Out Wafer Level Packaging
  • Fan-Out Panel Level Packaging
  • SiP/ FOWLP SiP/ FOPLP SiP
  • Double Sides BGA (Double Sided Assembly, Double Sided Mold)
  • Warpage Technology (WLFO Warpage, Substrate Warpage, POP Warpage)
  • Delamination Prevention
  • Cu Interconnection (Cu Bump, Cu Wire, Cu Clip, etc.) Reliability
  • Various MEMS/ Sensor Fusion Packaging Technology
  • Package Level EMI Shielding Technology
  • 5G Antenna Module Packaging
  • Packaging/ Design Simulation Technology
  • Substrate Structure Technology (Embedded PCB, SLP, Coreless Thin, Molded Leadframe and etc.)
  • Substrate Material Technology (Dielectric Material for 5G and etc.)
  • Packaging Process Automatic Inspection System (AOI, X-ray and etc.)

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일정안내

  • 초록 제출 마감: 2018년 9월 30일
  • 초록 심사 결과 발표: 2018년 10월 31일
  • 발표자료 제출 마감: 2019년 1월 18일
  • 발표일: 세션에 따라 상이 (2019년 1월 23일 혹은 24일)

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